Research on Dedicated High Frequency Class E Power Amplifier

1 Introduction

With the development of wireless communication technology, power amplifier is one of the most important parts of the transmitter. Its performance directly affects the performance of the whole communication system, and the performance of the power amplifier is related to chip detection. This paper introduces the design of a class E power amplifier chip performance test circuit, introduces the experimental equipment and equipment used in the test, and adds various test signals to the test circuit to observe the display results, and analyze the output results to determine Is the chip qualified?

2. Class E power amplifier principle

An RF power amplifier is a power device that converts a DC signal into an RF signal. The main parameters that measure the performance of an RF amplifier are: maximum output power, efficiency, linearity, gain, and so on. Power amplifiers can be divided into several categories depending on whether they are broadband or narrowband, and whether they are intended for linear or constant envelope operation. There are four types of linear power amplifiers: A, B, AB, and C. The main difference is the difference in bias conditions. These types of conventional power amplifiers have higher linearity but lower efficiency. Switch mode power amplifiers mainly have three types: D, E, and F. In these types of power amplifiers, the transistor is equivalent to a switch controlled by the input voltage. When the switch is turned on, there is a current passing through. If the tube is saturated, the on-resistance is ensured. Very small, the voltage across the switch is small, even approaching zero; when the switch is off, the current is zero. Therefore, the dissipated power of the transistor is small, thereby increasing the efficiency of the amplifier.

The Class E amplifier in the switch mode power amplifier uses a high-order reactance network to provide sufficient freedom to change the waveform of the switching voltage so that its value and slope are zero when the switch is turned on, thereby reducing the loss of the switch. As shown in Figure 1.

Power amplifier

In Figure 1, a series-tuned L2C2 circuit connects the drain to the load and a bypass capacitor C to ground. The bypass capacitor consists of the parasitic capacitance of the transistor and another capacitor C1 (the function of this capacitor is to ensure that no current flows through the transistor when there is a voltage at the drain). For best performance, when the device turns on (and begins to generate current), not only must its drain voltage be zero, but the drain voltage slope must also be zero. This ensures that the current from the bypass capacitor is zero, which also ensures that the leakage current is zero when the transistor is turned on. Since the leakage, source voltage, and leakage current in the conversion are both zero, the power consumption of the device is negligible.

Although the efficiency of a class E amplifier can theoretically reach 100%, a higher Q value is required to suppress harmonics, thereby limiting its efficiency, which causes the drain voltage value to be as low as 0V and the slope with time to be zero.

3. High-frequency class E power amplifier test circuit design

In order to test the high-frequency class E power amplifier, the schematic diagram of the test circuit schematic designed by us is shown in Figure 2. It can be seen from the figure that the schematic diagram is mainly composed of the main chip and its peripheral module circuit, wherein the peripheral circuit has GSM. (Signal at 800MHz signal) Signal input module, DCS (band at 1800MHz signal) signal input module, power module and signal output module.

Test principle structure diagram

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