I believe that everyone and Xiaobian understand Matlab and FPGA development, but have you thought about using Matlab to develop your FPGA? For a while, MathWorks has been advocating model-based design using Matlab and Simulink development tools, because good design techniques allow you to develop higher quality complex software in less time. (See the MathWorks white paper: "How small teams use module-based design"). The module-based design uses mathematical and visual methods to develop complex control and signal processing systems through system-level modeling (from initial design to design analysis, simulation, automated code generation and development and verification) used throughout the development process. . These modules are executable specifications consisting of block diagrams, text programs, and other graphical elements. Model-based design encourages a quick exploration of the broader design space of other design methods because you can iterate over the design faster in the early stages of the design cycle. Moreover, since these models are executable, verification becomes an integral part of every step of the development process. Xilinx supports modular design with the new Xilinx Model Editor, a design tool integrated into Matlab and Simulink environments, and Matlab and Simulink. Xilinx Model Composer includes more than 80 libraries and includes more than 80 high-performance optimized Xilinx-specific modules, including dedicated modules for computer vision, image processing, and linear algebra. And you can also import custom IP blocks written in C and C++, which are then processed by Vivado HLS. The following block diagram shows the relationship between MathWorks' Matlab, Simulink and Xilinx Model Composer. As the development system continues to be complex, modular design will be a trend in future design, which will bring great convenience to designers, both in design and in debugging, with the modularization of Xilinx FPGAs. The promotion of design, I believe that the threshold for design on the FPGA side will also be reduced, which is a benefit for hardware developers.
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