Component level multimedia function module for mobile phone SoC design

Although video encoding and decoding is a complex process, Tensilica's Diamond family of standard audio and video engines simplifies the design tasks of the SoC design team. The Diamond standard audio and video engine is like a low-power black box, so SoC designers can integrate it into portable multimedia and mobile phone chips without having to be proficient in H.264/AVC, MPEG-4 and digital audio.

The video encoding process is shown in Figure 1. First, the SoC host processor configures the Diamond video engine by instructions, and then sends unencoded video frames to the engine, which encodes the video frames and sends the encoded image data (VDE) back to the host processor. For video decoding, the main processor first configures the Diamond video engine by instruction, then sends the VDE to it, decodes the image, and finally passes the decoded frame back to the main processor. In the audio decoding process, the main processor sends the compressed audio stream to the Diamond audio engine for decompression into an audio data stream.

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Encoded and unencoded video data into and out of the Diamond video engine schematic

Figure 1: Schematic of encoded and unencoded video data in and out of the Diamond video engine

There are two configured processors in the Diamond video engine kernel that perform the video compression task together, while the integrated DMA controller is responsible for sending and sending images before and after compression to the kernel, and two processing in the kernel. Pass between the devices. Both of the processors in the Diamond video engine core use Tensilica's configurable Xtensa processor architecture, and the engine's stream processor performs bitstream parsing and entropy encoding by adding additional instructions.

Some of these new instructions are based on Tensilica's Variable Length Instruction Extension (FLIX) and use the VLIW instruction format for two independent operations per instruction. The pixel processor of the Diamond video engine also adds single instruction multiple data (SIMD) instructions that can operate multiple pixels simultaneously.

Instructions added to the stream processor and pixel processor enable the Diamond video engine to encode MPEG4 ASP bitstreams or decode H at standard resolution (SD or D1) display resolution and 30 frames per second at clock rates below 200MHz. .264/AVC MP, MPEG4 ASP, MPEG2 MP, and VC-1/WMV9 MP video bitstreams.

All internal operations of the Diamond video engine are invisible to the main processor, which is in line with its identity as a component-level SoC module. The main processor operates the Diamond video engine by calling a set of predefined APIs. When running a video application, the main processor uses two queues in the main system memory to send instruction messages and data to the Diamond video engine, and two other queues to receive status messages and data from the Diamond video engine. Queue-based message transactions are initiated by firmware-driven interrupts between the host processor and the Diamond video engine.

Audio and video SoC design examples with Tensilica Diamond video engine

Figure 2: Audio and video SoC design example with Tensilica Diamond video engine

The hardware design combined with Tensilica's Diamond video engine is also not complicated. Like other system components, the Diamond video engine is connected to the main system bus, as shown in Figure 2. At the same time, the Diamond 330HiFi audio engine core can perform digital audio decoding to match the Diamond video engine and synchronize them by the host processor. The Diamond 330HiFi Audio Engine's software library contains a number of ready-to-run digital audio codecs. In some designs, the engine can also be used as a host processor.

The Diamond standard audio and video engine, which has been mass-produced in multimedia devices and mobile SoCs, explains how processors and directly-operable firmware form a complex, high-performance, low-power IP core. With this module-oriented design approach, SoC development teams can quickly build complex SoCs with complex and proven IP cores and then program these SoCs with application code to deliver unique products to the market. Due to the rapid development of multimedia compression standards and the shortened design time, this black box design method has become more and more important.

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